1. Field of the Invention
The present invention relates in general to the field of computers and similar technologies, and in particular to computer input output (IO) performance. Still more particularly, the present invention relates to dynamically reassigning buffer allocation to maximize IO performance of virtual lanes.
2. Description of the Related Art
Given the continually increased reliance on computers in contemporary society, computer technology has had to advance on many fronts to keep up with increased performance demands. To meet increased performance demands, it is often desirable to provide increasingly faster and more complex hardware components. Furthermore, in many applications, multiple hardware components, such as processors and peripheral components such as storage devices, network connections, etc., are operated in parallel to increase overall system performance.
One particular area to which development efforts have been directed is that of managing hardware components utilized by a computer, e.g., storage devices, network connections, workstations, and the adapters, controllers and other interconnection hardware devices utilized to connect such components to the central processing units (i.e, the processors) of the computer. Peripheral components, which are often referred to as input/output (IO) resources, are typically coupled to a computer via one or more intermediate interconnection hardware devices components that form a “fabric” through which communications between the central processing units and the IO resources pass.
In higher performance computer designs, the IO performance may necessitate a complex configuration of interconnection hardware devices to handle the communications needs of the designs. In some instances, the communications needs may be great enough to necessitate additional enclosures that are separate from, and coupled to, the enclosure within which the central processing units of a computer are housed.
Often, in more complex designs, peripheral components such as IO adapters may be coupled to an IO fabric using slots that are arrayed in either or both of a main enclosure or an auxiliary enclosure of a computer. Other components may be mounted or coupled to an IO fabric in other manners, e.g., via cables and other types of connectors; however, these other types of connections are also referred to as slots. Regardless of the type of connection used, an IO slot therefore represents a connection point, or IO endpoint, for an IO resource to communicate with a computer via an IO fabric.
In higher performance computer designs, the number of IO slots available in a system can scale up into the hundreds. When dealing with a large number of IO slots, the IO can be separated from the CPU Complex using IO drawers. To connect the IO drawers to the CPU complex, the IO function is divided into two components, Hubs and Bridges. Hubs refer to the portion of the IO function that is directly connected to the processor complex (also referred to as a processor node). Bridges refer to the components in the IO Drawers that connect with the Hubs.
Depending on the IO Drawer design, there can be one or multiple IO bridges per IO drawer. As systems scale out, the number of IO Hubs also increases along with the number of IO Bridges. When attaching multiple IO bridges to a single hub, the bridges can be strung together and connected to the Hub in a loop or string configuration. The data is passed between the hub and bridges via a bus such as an industry standard bus such as an INFINIBAND bus or a peripheral component interconnect express (PCI-Express) bus. Buses that conform to the INFINIBAND or PCI-Express protocols use a concept referred to as virtual lanes to pass data between the various components. Each virtual lane has a set amount of buffer space assigned to it for passing data in both directions. One issue relating to virtual lanes is that due to cost and space limitations, the amount of buffer space per virtual lane is limited. This limitation can dictate the overall IO performance of the system and individual IO components.
Accordingly, it would be desirable to provide a method for reassigning buffer space during initialization and runtime applications to maximize IO performance of virtual lanes.